WDG configuration structure. More...
#include <bflb_wdg.h>
Collaboration diagram for bflb_wdg_config_s:
Data Fields | |
| uint8_t | clock_source |
| uint8_t | clock_div |
| uint16_t | comp_val |
| uint8_t | mode |
Detailed Description
WDG configuration structure.
- Parameters
-
clock_source Wdg clock source, use BFLB_SYSTEM_* definition clock_div Wdg clock divison value, from 0 to 255 comp_val Wdg compare value mode Wdg reset/interrupt mode
Definition at line 42 of file bflb_wdg.h.
Field Documentation
◆ clock_div
| uint8_t clock_div |
Definition at line 44 of file bflb_wdg.h.
◆ clock_source
| uint8_t clock_source |
Definition at line 43 of file bflb_wdg.h.
◆ comp_val
| uint16_t comp_val |
Definition at line 45 of file bflb_wdg.h.
◆ mode
| uint8_t mode |
Definition at line 46 of file bflb_wdg.h.
The documentation for this struct was generated from the following file:
- drivers/lhal/include/bflb_wdg.h
