Bouffalo SDK  1.0
Bouffalolab Software Development Kit
bflb_spi_psram.h
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1 
36 #ifndef __BFLB_SPI_PSRAM_H__
37 #define __BFLB_SPI_PSRAM_H__
38 
39 #include "bflb_sf_ctrl.h"
40 
52 #define PSRAM_DRIVE_STRENGTH_50_OHMS 0
53 #define PSRAM_DRIVE_STRENGTH_100_OHMS 1
54 #define PSRAM_DRIVE_STRENGTH_200_OHMS 2
59 #define PSRAM_BURST_LENGTH_16_BYTES 0
60 #define PSRAM_BURST_LENGTH_32_BYTES 1
61 #define PSRAM_BURST_LENGTH_64_BYTES 2
62 #define PSRAM_BURST_LENGTH_512_BYTES 3
67 #define PSRAM_SPI_CTRL_MODE 0
68 #define PSRAM_QPI_CTRL_MODE 1
73 struct spi_psram_cfg_type {
74  uint8_t read_id_cmd;
75  uint8_t read_id_dmy_clk;
76  uint8_t burst_toggle_cmd;
77  uint8_t reset_enable_cmd;
78  uint8_t reset_cmd;
81  uint8_t read_reg_cmd;
82  uint8_t read_reg_dmy_clk;
83  uint8_t write_reg_cmd;
84  uint8_t read_cmd;
85  uint8_t read_dmy_clk;
86  uint8_t f_read_cmd;
87  uint8_t f_read_dmy_clk;
88  uint8_t f_read_quad_cmd;
90  uint8_t write_cmd;
91  uint8_t quad_write_cmd;
92  uint16_t page_size;
93 #if defined(BL702L)
94  uint8_t burst_toggle_en;
95 #endif
96  uint8_t ctrl_mode;
97  uint8_t drive_strength;
98  uint8_t burst_length;
99 };
100 
101 #ifdef __cplusplus
102 extern "C" {
103 #endif
104 
105 void bflb_psram_init(struct spi_psram_cfg_type *psram_cfg, struct sf_ctrl_cmds_cfg *cmds_cfg,
106  struct sf_ctrl_psram_cfg *sf_ctrl_psram_cfg);
107 void bflb_psram_readreg(struct spi_psram_cfg_type *psram_cfg, uint8_t *reg_value);
108 void bflb_psram_writereg(struct spi_psram_cfg_type *psram_cfg, uint8_t *reg_value);
109 int bflb_psram_setdrivestrength(struct spi_psram_cfg_type *psram_cfg);
110 int bflb_psram_setburstwrap(struct spi_psram_cfg_type *psram_cfg);
111 void bflb_psram_readid(struct spi_psram_cfg_type *psram_cfg, uint8_t *data);
112 int bflb_psram_enterquadmode(struct spi_psram_cfg_type *psram_cfg);
113 int bflb_psram_exitquadmode(struct spi_psram_cfg_type *psram_cfg);
114 int bflb_psram_toggleburstlength(struct spi_psram_cfg_type *psram_cfg, uint8_t ctrl_mode);
115 int bflb_psram_softwarereset(struct spi_psram_cfg_type *psram_cfg, uint8_t ctrl_mode);
116 int bflb_psram_set_idbus_cfg(struct spi_psram_cfg_type *psram_cfg, uint8_t io_mode, uint32_t addr, uint32_t len);
117 int bflb_psram_cache_write_set(struct spi_psram_cfg_type *psram_cfg, uint8_t io_mode, uint8_t wt_en,
118  uint8_t wb_en, uint8_t wa_en);
119 int bflb_psram_write(struct spi_psram_cfg_type *psram_cfg, uint8_t io_mode, uint32_t addr, uint8_t *data, uint32_t len);
120 int bflb_psram_read(struct spi_psram_cfg_type *psram_cfg, uint8_t io_mode, uint32_t addr, uint8_t *data, uint32_t len);
121 
122 #ifdef __cplusplus
123 }
124 #endif
125 
134 #endif /* __BFLB_SPI_PSRAM_H__ */
int bflb_psram_setburstwrap(struct spi_psram_cfg_type *psram_cfg)
uint8_t f_read_quad_dmy_clk
void bflb_psram_init(struct spi_psram_cfg_type *psram_cfg, struct sf_ctrl_cmds_cfg *cmds_cfg, struct sf_ctrl_psram_cfg *sf_ctrl_psram_cfg)
uint8_t enter_quad_mode_cmd
int bflb_psram_exitquadmode(struct spi_psram_cfg_type *psram_cfg)
int bflb_psram_cache_write_set(struct spi_psram_cfg_type *psram_cfg, uint8_t io_mode, uint8_t wt_en, uint8_t wb_en, uint8_t wa_en)
int bflb_psram_write(struct spi_psram_cfg_type *psram_cfg, uint8_t io_mode, uint32_t addr, uint8_t *data, uint32_t len)
int bflb_psram_enterquadmode(struct spi_psram_cfg_type *psram_cfg)
void bflb_psram_readid(struct spi_psram_cfg_type *psram_cfg, uint8_t *data)
Psram ctrl configuration structure type definition.
int bflb_psram_softwarereset(struct spi_psram_cfg_type *psram_cfg, uint8_t ctrl_mode)
int bflb_psram_toggleburstlength(struct spi_psram_cfg_type *psram_cfg, uint8_t ctrl_mode)
int bflb_psram_setdrivestrength(struct spi_psram_cfg_type *psram_cfg)
void bflb_psram_writereg(struct spi_psram_cfg_type *psram_cfg, uint8_t *reg_value)
int bflb_psram_read(struct spi_psram_cfg_type *psram_cfg, uint8_t io_mode, uint32_t addr, uint8_t *data, uint32_t len)
void bflb_psram_readreg(struct spi_psram_cfg_type *psram_cfg, uint8_t *reg_value)
uint8_t exit_quad_mode_cmd
int bflb_psram_set_idbus_cfg(struct spi_psram_cfg_type *psram_cfg, uint8_t io_mode, uint32_t addr, uint32_t len)