14 #if defined(BL602) || defined(BL702) 15 #define SPI_FIFO_WORD_NUM_MAX 4 16 #define SPI_FIFO_WIDTH_VARIABLE_SUPPORT 0 17 #elif defined(BL606P) || defined(BL808) 18 #define SPI_FIFO_BYTE_NUM_MAX 32 19 #define SPI_FIFO_WIDTH_VARIABLE_SUPPORT 1 20 #elif defined(BL616) || defined(BL628) 21 #define SPI_FIFO_BYTE_NUM_MAX 32 22 #define SPI_FIFO_WIDTH_VARIABLE_SUPPORT 1 24 #define SPI_FIFO_BYTE_NUM_MAX 16 25 #define SPI_FIFO_WIDTH_VARIABLE_SUPPORT 1 27 #error "unknown device" 33 #define SPI_ROLE_MASTER 0 34 #define SPI_ROLE_SLAVE 1 53 #define SPI_DATA_WIDTH_8BIT 1 54 #define SPI_DATA_WIDTH_16BIT 2 55 #define SPI_DATA_WIDTH_24BIT 3 56 #define SPI_DATA_WIDTH_32BIT 4 73 #define SPI_BYTE_LSB 0 74 #if !defined(BL602) && !defined(BL702) 75 #define SPI_BYTE_MSB 1 84 #define SPI_INTSTS_TC (1 << 0) 85 #define SPI_INTSTS_TX_FIFO (1 << 1) 86 #define SPI_INTSTS_RX_FIFO (1 << 2) 87 #define SPI_INTSTS_SLAVE_TIMEOUT (1 << 3) 88 #define SPI_INTSTS_SLAVE_TX_UNDERRUN (1 << 4) 89 #define SPI_INTSTS_FIFO_ERR (1 << 5) 97 #define SPI_INTCLR_TC (1 << 16) 98 #define SPI_INTCLR_SLAVE_TIMEOUT (1 << 19) 99 #define SPI_INTCLR_SLAVE_TX_UNDERRUN (1 << 20) 107 #define SPI_CMD_SET_DATA_WIDTH (0x01) 108 #define SPI_CMD_GET_DATA_WIDTH (0x02) 109 #define SPI_CMD_CLEAR_TX_FIFO (0x03) 110 #define SPI_CMD_CLEAR_RX_FIFO (0x04) 111 #define SPI_CMD_SET_CS_INTERVAL (0x05) 112 #define SPI_CMD_RX_IGNORE (0x06) 113 #define SPI_CMD_SET_MODE (0x07) 114 #define SPI_CMD_GET_MODE (0x08) 115 #define SPI_CMD_SET_FREQ (0x09) 116 #define SPI_CMD_GET_FREQ (0x0A) 117 #define SPI_CMD_SET_BIT_ORDER (0x0B) 118 #define SPI_CMD_GET_BIT_ORDER (0x0C) 119 #define SPI_CMD_SET_BYTE_ORDER (0x0E) 120 #define SPI_CMD_GET_BYTE_ORDER (0x0F) void bflb_spi_rxint_mask(struct bflb_device_s *dev, bool mask)
Enable or disable spi rx fifo threhold interrupt.
void bflb_spi_tcint_mask(struct bflb_device_s *dev, bool mask)
Enable or disable spi transfer done interrupt.
uint32_t bflb_spi_get_intstatus(struct bflb_device_s *dev)
Get spi interrupt status.
int bflb_spi_poll_exchange(struct bflb_device_s *dev, const void *txbuffer, void *rxbuffer, size_t nbytes)
Send and receive a block of data on spi.
void bflb_spi_link_rxdma(struct bflb_device_s *dev, bool enable)
Enable spi rx dma.
uint8_t rx_fifo_threshold
void bflb_spi_init(struct bflb_device_s *dev, const struct bflb_spi_config_s *config)
Initialize spi.
SPI configuration structure.
uint8_t tx_fifo_threshold
uint32_t bflb_spi_poll_send(struct bflb_device_s *dev, uint32_t data)
Send and receive one data on spi.
void bflb_spi_txint_mask(struct bflb_device_s *dev, bool mask)
Enable or disable spi rx fifo threhold interrupt.
void bflb_spi_errint_mask(struct bflb_device_s *dev, bool mask)
Enable or disable spi error interrupt.
void bflb_spi_deinit(struct bflb_device_s *dev)
Deinitialize spi.
void bflb_spi_link_txdma(struct bflb_device_s *dev, bool enable)
Enable spi tx dma.
bool bflb_spi_isbusy(struct bflb_device_s *dev)
Check if spi is busy.
int bflb_spi_feature_control(struct bflb_device_s *dev, int cmd, size_t arg)
Control spi feature.
void bflb_spi_int_clear(struct bflb_device_s *dev, uint32_t int_clear)
Clear spi interrupt status.