Bouffalo SDK  1.0
Bouffalolab Software Development Kit
bflb_pwm_v1_channel_config_s Struct Reference

PWM configuration structure. More...

#include <bflb_pwm_v1.h>

Collaboration diagram for bflb_pwm_v1_channel_config_s:
Collaboration graph

Data Fields

uint8_t clk_source
 
uint16_t clk_div
 
uint16_t period
 

Detailed Description

PWM configuration structure.

Parameters
clk_sourcePWM clock source, use system clock definition
clk_divPWM clock dividor, should be in 1~65535
periodPWM period count, should be in 2~65535

Definition at line 79 of file bflb_pwm_v1.h.

Field Documentation

◆ clk_div

uint16_t clk_div

Definition at line 81 of file bflb_pwm_v1.h.

◆ clk_source

uint8_t clk_source

Definition at line 80 of file bflb_pwm_v1.h.

◆ period

uint16_t period

Definition at line 82 of file bflb_pwm_v1.h.


The documentation for this struct was generated from the following file: