36 #ifndef __BFLB_SPI_PSRAM_H__ 37 #define __BFLB_SPI_PSRAM_H__ 39 #include "bflb_sf_ctrl.h" 52 #define PSRAM_DRIVE_STRENGTH_50_OHMS 0 53 #define PSRAM_DRIVE_STRENGTH_100_OHMS 1 54 #define PSRAM_DRIVE_STRENGTH_200_OHMS 2 59 #define PSRAM_BURST_LENGTH_16_BYTES 0 60 #define PSRAM_BURST_LENGTH_32_BYTES 1 61 #define PSRAM_BURST_LENGTH_64_BYTES 2 62 #define PSRAM_BURST_LENGTH_512_BYTES 3 67 #define PSRAM_SPI_CTRL_MODE 0 68 #define PSRAM_QPI_CTRL_MODE 1 73 struct spi_psram_cfg_type { 94 uint8_t burst_toggle_en;
106 struct sf_ctrl_psram_cfg *sf_ctrl_psram_cfg);
118 uint8_t wb_en, uint8_t wa_en);
int bflb_psram_setburstwrap(struct spi_psram_cfg_type *psram_cfg)
uint8_t f_read_quad_dmy_clk
void bflb_psram_init(struct spi_psram_cfg_type *psram_cfg, struct sf_ctrl_cmds_cfg *cmds_cfg, struct sf_ctrl_psram_cfg *sf_ctrl_psram_cfg)
uint8_t enter_quad_mode_cmd
int bflb_psram_exitquadmode(struct spi_psram_cfg_type *psram_cfg)
int bflb_psram_cache_write_set(struct spi_psram_cfg_type *psram_cfg, uint8_t io_mode, uint8_t wt_en, uint8_t wb_en, uint8_t wa_en)
int bflb_psram_write(struct spi_psram_cfg_type *psram_cfg, uint8_t io_mode, uint32_t addr, uint8_t *data, uint32_t len)
int bflb_psram_enterquadmode(struct spi_psram_cfg_type *psram_cfg)
void bflb_psram_readid(struct spi_psram_cfg_type *psram_cfg, uint8_t *data)
Psram ctrl configuration structure type definition.
int bflb_psram_softwarereset(struct spi_psram_cfg_type *psram_cfg, uint8_t ctrl_mode)
int bflb_psram_toggleburstlength(struct spi_psram_cfg_type *psram_cfg, uint8_t ctrl_mode)
int bflb_psram_setdrivestrength(struct spi_psram_cfg_type *psram_cfg)
void bflb_psram_writereg(struct spi_psram_cfg_type *psram_cfg, uint8_t *reg_value)
int bflb_psram_read(struct spi_psram_cfg_type *psram_cfg, uint8_t io_mode, uint32_t addr, uint8_t *data, uint32_t len)
void bflb_psram_readreg(struct spi_psram_cfg_type *psram_cfg, uint8_t *reg_value)
uint8_t exit_quad_mode_cmd
int bflb_psram_set_idbus_cfg(struct spi_psram_cfg_type *psram_cfg, uint8_t io_mode, uint32_t addr, uint32_t len)